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TRF1121
TRF1221
SLWS170B – APRIL 2005 – REVISED JANUARY 2008
INPUT REFERENCE REQUIREMENTS
Conditions: Signal BW = 6 MHz nom, 15 dB maximum loss IF2 SAW filter. See Figure 19
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f Ref
PARAMETER
Reference frequency
TEST CONDITIONS
MIN
TYP
18
MAX
UNIT
MHz
Temperature stability
Customer requirements
PPM
V FR
DC fref
t FR
f FR
Ref. source input voltage (1)
Reference input symmetry
Reference source pulse rise time
Reference phase noise at 10-k ? offset
HCMOS output
Waveform duty cycle
10% to 90% of maximum voltage transition
4
40%
4.5
1
–153
5
60%
4
–150
Vpp
ns
dBc/Hz
(1)
Note that for source peak-to-peak voltages of less than 4 V and dc component other than 2.5 V, degradation of the close-in phase noise
may occur. For oscillators with no dc component, a dc voltage may be applied using a voltage divider (see the schematic, Figure 23 ).
AC TIMING, SERIAL BUS INTERFACE
CD I
D V C
CE L
Data
A[7]=MSB
A[6]
A[5]
A[4]
D[1]
D[0] LSB
Clock
EN
E L C
C PWH
C PWL
E PWH
CD I
D V C
C PWH
C PWL
CE L
E L C
E PWH
PARAMETER
Clock to data invalid
Data valid to clock
Clock pulse duration high
Clock pulse duration low
Clock to enable low
Enable low to clock
Enable pulse duration
MIN
10
10
50
50
10
10
10
TYP
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
Figure 1. Serial Interface Timing Diagram
6
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